User manual TYAN TEMPEST II
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Manual abstract: user guide TYAN TEMPEST II
Detailed instructions for use are in the User's Guide.
[. . . ] Introduction
1. 1 Preface
S1462 is a Dual Intel Pentium based PC/AT mainboard. With 75MHz thru 166MHz CPU, PCI local bus, EISA bus, it can be used with the fastest PC/ AT systems.
1. 2 Key Features
* Single or Dual Pentium based PC/AT compatible mainboard with Intel Neptune chipset * 4 Master/Slave PCI Bus slots, 5 EISA Bus slots (4 master). * Supports 256/512 KB 2nd level cache memory, either synchronous or standard SRAM. * Flash BIOS support * On-board NCR SCSI (NC810) BIOS firmware * RTC and 8KB EISA configuration memory * BABY AT form factor, 6 layers PCB.
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1. 3. [. . . ] The default is Enabled
Enabled BIOS searches for floppy disk drive to determine if it is 40 or 80 tracks, note that the BIOS can not tell from 720K, 1. 2M or 1. 44M drive type as they are all 80 tracks BIOS will not search for the type of floppy disk drive by track number. Note that there will not be any warning messages if the drive installed is 360K
Disabled
* Boot Up NumLock Status The default Value is On
On Off Keypad is number keys Keypad is arrow keys
* IDE HDD Block Mode The default value is enabled
Enabled Enable IDE HDD Block Mode Disabled Disable IDE HDD Block Mode
* Gate A20 Option Gate A20 controls the ability to access memory addresses above 1 MB by enabling (Fast) or disabling (Normal) access to the processor. * Typematic Rate Setting, Typematic Rate (char/sec), and Typematic Delay. Typematic Rate (6, 8, 10, 12, 15, 20, 24, or 30 characters per second) and Typematic Rate Delay (250, 500, 750, or 1000 milliseconds) control the speed at which the keystroke is repeated. The selected character is displayed when a key is held down after a delay set by the TypematicRate Delay. It then repeats at a rate set by the Typematic Rate Value.
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* Security Option This category allows you to limit access to the system setup, or just setup. The default value is Setup
System The system will not boot and access to Setup will be denied if the correct password is not entered at the prompt Setup The system will boot, but access to setup will be denied if the password is not entered at the prompt
* System BIOS Shadow, and Video BIOS Shadow It determines whether System or Video BIOS will be copied to RAM, however, it is an optional chipset design. The default is enabled.
4. 7 Chipset Features Setup
This screen controls the settings for the board's chip set. The Chipset Features Screen
ROM EISA BIOS CHIPSET SETUP UTILITY AWARD SOFTWARE, INC. CPU To DRAM Write Buffer CPU To PCI Write Buffer System BIOS Cachable Video BIOS Cachable Cache Write Policy PCI-To-PCI Byte Merge VGA 128K Range Attribute :Enabled :Enabled :Enabled :Enabled :Wr-Back :Disabled :Disabled Memory Hole Start Address Memory Hole Size NCR SCSI Controller :15 MB :Disabled :Disabled
ESC :Quit F1 F5 F6 F7
:Select Item
:Help PU/PD/+/- :Modify :Old Values (Shift)F2 :Color :Load BIOS Defaults :Load Setup Defaults
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* CPU To DRAM Write Buffer This is the Optimum setting for this mainboard. The "Disabled" setting will significantly reduce performance. * System BIOS Cacheable, and Video BIOS Cacheable These settings make the system and video BIOSes cached. * Cache Write Policy Write back is the optimum setting for this mainboard. * PCI-To-PCI Byte Merge, and VGA 128K Range Attribute The default set is "Disabled". * Memory Hole Size There are two options "Disabled", and "1MB". * NRC SCSI Controller If you are using NCR 810 SCSI devices, set the onboard NCR SCSI Controller to "Enabled". If you are using a separate SCSI controller card, make this function to "Disabled"
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4. 8 PCI Slot Configuration
ROM EISA BIOS PCI SLOT CONFIGURATION AWARD SOFTWARE, INC.
Slot1 Using INT# : Slot2 Using INT#: Slot3 Using INT#: Slot4 Using INT#: 1st Available IRQ#: 2rd Available IRQ#: 3rd Available IRQ# 4th Available IRQ# PCI IRQ Actived By: PCI IDE IRQ Map To: Primary IDE INT#: Secondary IDE INT#: INTA INTB INTC INTD 10 11 12 9 Level ESC: Quit F1 : Help PU/PD/+/F5 : Old Values (Shift)F2 F6 : Load BIOS Defaults F7 : Load Setup Defaults :Select Item :Modify :Color
* PCI Slot 1/Slot 2/Slot 3/slot 4 INT# * For Default Setting. Connect to PCI System INT# PCI Slot1 INTA INTA PCI Slot1 INTB INTB PCI Slot1 INTC INTC PCI Slot1 INTD INTD PCI Slot2 INTA INTB PCI Slot2 INTB INTC PCI Slot2 INTC INTD PCI Slot2 INTD INTA PCI Slot3 INTA INTC PCI Slot3 INTB INTD PCI Slot3 INTC INTA PCI Slot3 INTD INTB PCI Slot4 INTA INTD PCI Slot4 INTB INTA PCI Slot4 INTC INTB PCI Slot4 INTD INTC
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*1st Available IRQ# *2nd Available IRQ# *3rd Available IRQ# *4th Available IRQ# Select four Available IRQs assigned to PCI slots INT *PCI IRQ Actived By: Select the PCI IRQ Active scheme either LEVEL or EDAGE. *PCI IDE IRQ Map To: Select the IDE IRQ Map to ISA IRQ# *Primary IDE INT# Select the Primary IDE disk controller uses the PCI INT#. *Secondary IDE INT# Select the Secondary IDE Disk Controller uses the PCI INT# * If you use FOUR NCR 810/825 SCSI-PCI cards in the system, you need to assign IRQ 10 for the card that is in slot 1. In the same way, assign IRQ 11 for the card in slot 2, assign IRQ12 for the card in slot 3, and assign IRQ 9 for the card in slot 4. However, no matter which slot the SCSI-PCI card was inserted, you should set INT A to enabled SCSI-PCI card itself. [. . . ] any non fatal errors that were detected durning POST) and enter setup Ask password security (optional)
4F 50
Security Write
check
CMOS
Write all CMOS values back to RAM and clear screen Enable parity checker. Enable NMI, Enable
51
PRE-boot
enable
52
Initialize ROM's
Option
Initialize any option ROM's present for C8000h to EFFFFh. Setup Virus protect according to setup set system speed for boot setup NumLock status according to Setup
53 60 61 62 63 B0 B1
Initialize Setup Set
Time Virus
Protect
Boot
Speed
Setup Boot
NunLock Attempt
Set low stack.
Boot via INT 19h
Spurious Unclaimed NMI
If interrupt occurs in protected mode. fi unmasked NMI occurs, display Press F1 to disable NMI , F2 Reboot E1-Page 1, E2-Page 2, ect.
E1-EF
Setup
Pages
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Appendix B: Post Codes (AMI) . [. . . ]
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